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RT8056 1 ds8056-02 april 2011 www.richtek.com pin configurations (top view) wdfn-10l 3x3 applications z portable instruments z microprocessors and dsp core supplies z cellular phones z wireless and dsl modems z pc cards z set top box dual 1a 1.5mhz synchronous step-down converters general description the RT8056 is a high efficiency synchronous dual step- down converter. capable of delivering two independent 1a output current over a wide input voltage range from 2.8v to 5.5v. the RT8056 is ideally suited for portable electronic devices that are powered from 1-cell li-ion battery or from other power sources such as cellular phones, pdas and hand-held devices. the RT8056 provides two operation modes including pwm/low- dropout auto switch and shutdown modes. the internal synchronous rectifier with low r ds(on) dramatically reduces conduction loss at pwm mode. no external schottky diode is required in practical applications. the RT8056 enters low-dropout mode when normal pwm cannot provide regulated output voltage by continuously turning on the upper p-mosfet. the RT8056 enters shut-down mode and consumes less than 0.1 a when en pin is pulled low. the switching ripple is easily smoothed-out by small package filtering elements due to a fixed operating frequency of 1.5mhz. features z z z z z 2.8v to 5.5v input voltage range z z z z z 1.5mhz fixed frequency pwm operation z z z z z 2 x 1a output current z z z z z up to 95% efficiency z z z z z no schottky diode required z z z z z 0.6v reference allows for low output voltage z z z z z low dropout operation : 100% duty cycle z z z z z small 10-lead wdfn package z z z z z rohs compliant and halogen free fb2 nc fb1 nc lx2 en2 gnd lx1 en1 vin 9 8 7 1 2 3 4 5 10 6 gnd 11 ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. marking information jm=ym dnn jm= : product code ymdnn : date code RT8056 package type qw : wdfn-10l 3x3 (w-type) lead plating system g : green (halogen free and pb free)
RT8056 2 ds8056-02 april 2011 www.richtek.com function block diagram function pin description pin no. pin name pin function 1 fb2 feedback input of channel 2. 2, 4 nc no internal connection. 3 vin power supply input of channel 1 & channel 2. 5 fb1 feedback input of channel 1. 6 lx1 switching node of channel 1. 7 en1 chip enable of channel 1 (active high). 8, 11 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 9 en2 chip enable of channel 2 (active high). 10 lx2 switching node of channel 2. comp rc rs1 rs2 en1/en2 vin lx1/lx2 fb1/fb2 uvlo & power good detector v ref slope compensation current sense osc & shutdown control current limit detector driver control logic pwm comparator gnd error amplifier typical application circuit out1 out2 r1 v = 0.6v x 1 r2 r3 v = 0.6v x 1 r4 + + ?? ?? ?? ?? ?? ?? 10f 22f vin lx1 en2 RT8056 en1 lx2 2.2h 2.8v to 5.5v v in v out1 c in l1 10 6 3 7 8, 11 (exposed pad) c out1 gnd 9 chip enable fb1 fb2 5 1 r1 r2 r3 r4 22f c out2 2.2h l2 v out2
RT8056 3 ds8056-02 april 2011 www.richtek.com absolute maximum ratings (note 1) z supply input voltage, v in ------------------------------------------------------------------------------------------------------------------------------- ---- ? 0.3v to 6.5v z lx1, lx2 pin v oltages ----------------------------------------------------------------------------------------------- ? 0.3v to (v in +0.3v) z other i/o pin v oltages ---------------------------------------------------------------------------------------------- ? 0.3v to 6.5v z power dissipation, p d @ t a = 25 c wdfn-10l 3x3 -------------------------------------------------------------------------------------------------------- 1.429w z package thermal resistance (note 2) wdfn-10l 3x3, ja -------------------------------------------------------------------------------------------------- 70 c/w wdfn-10l 3x3, jc -------------------------------------------------------------------------------------------------- 8.2 c/w z lead temperature (soldering, 10 sec.) -------------------------------------------------------------------------- 260 c z junction temperature ------------------------------------------------------------------------------------------------ 150 c z storage temperature range --------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm --------------------------------------------------------------------------------------------------------------------- 2kv mm ----------------------------------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply input voltage, v in ------------------------------------------------------------------------------------------- 2.8v to 5.5v z junction temperature range --------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range --------------------------------------------------------------------------------------- ? 40 c to 85 c electrical characteristics parameter symbol test conditions min typ max unit quiescent current i q -- 300 -- a feedback reference voltage v ref 0.588 0.6 0.612 v v in rising -- 2.1 -- v under voltage lockout threshold v uvloh hysteresis -- 0.18 -- v shutdown current i shdn -- 0.1 1 a switching frequency 1.2 1.5 1.8 mhz logic high v ih 1.5 -- v in v enx threshold voltage logic low v il -- -- 0.4 v peak current limit i lim v in = 2.8v to 5.5v 1.1 1.5 -- a output voltage line regulation v in = 2.8v to 5.5v -- 0.04 0.4 %v output voltage load regulation 0ma < i load < 1a (note5) -- 1 -- % switch on-resistance, high r ds(on)_h i sw = 0.2a -- 280 -- m switch on resistance, low r ds(on)_l i sw = 0.2a -- 290 -- m thermal shutdown temperature t sd -- 138 -- c thermal shutdown hysteresis -- 18 -- c (v in = 3.6v, t a = 25 c unless otherwise specified)
RT8056 4 ds8056-02 april 2011 www.richtek.com note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a high effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. the measurement case position of jc is on the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. guaranteed by design.
RT8056 5 ds8056-02 april 2011 www.richtek.com typical operating characteristics frequency vs. temperature 1.10 1.20 1.30 1.40 1.50 1.60 1.70 -50 -25 0 25 50 75 100 125 temperature (c) frequency (mhz) 1 v in = 5v, v out = 1.2v, i out = 0.3a output voltage vs. output current 2.51 2.52 2.53 2.54 2.55 2.56 2.57 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output current (a) output voltage (v) v in = 5.5v v in = 5v v in = 3.3v v out = 2.5v output voltage vs. output current 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 output current (a) output voltage (v) v in = 5.5v v in = 5v v in = 3.3v v out = 1.2v efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output current (a) efficincy (%) v in = 3.3v v in = 5v v in = 5.5v v out = 1.2v efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output current (a) efficincy (%) v in = 3.3v v in = 5v v in = 5.5v v out = 2.5v current limit vs. input voltage 0.00 0.35 0.70 1.05 1.40 1.75 2.10 2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5 input voltage (v) peak current limit (a ) v in = 2.8v to 5.5v v out = 2.5v v out = 1.2v
RT8056 6 ds8056-02 april 2011 www.richtek.com output voltage vs. temperature 1.16 1.17 1.18 1.19 1.20 1.21 1.22 -50 -25 0 25 50 75 100 125 temperature (c) output voltage (v) v in = 5v, v out = 1.2v, i out = 0.3a reference voltage vs. temperature 0.580 0.585 0.590 0.595 0.600 0.605 0.610 0.615 0.620 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) v in = 5v, i out = 0.3a current limit vs. temperature 0.00 0.35 0.70 1.05 1.40 1.75 2.10 -50 -25 0 25 50 75 100 125 temperature (c) output current limit (a ) v out = 2.5v v out = 1.2v v in = 5v output voltage vs. input voltage 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5 input voltage (v) output voltage (v) v in = 2.8v to 5.5v, v out = 1.2v i out = 0.1a i out = 1a output ripple time (250ns/div) v out1 (5mv/div) v lx1 (5v/div) v in = 5v, v out = 1.2v, i out = 1a output ripple time (250ns/div) v in = 5v, v out = 2.5v, i out = 1a v out2 (5mv/div) v lx2 (5v/div)
RT8056 7 ds8056-02 april 2011 www.richtek.com load transient response time (100 s/div) i out (500ma/div) v out (50mv/div) v in = 5v, v out = 2.5v, i out = 50ma to 1000ma load transient response time (100 s/div) v out (50mv/div) i out (500ma/div) v in = 5v, v out = 1.2v, i out = 50ma to 1000ma power on from en time (250 s/div) en (5v/div) i in (1a/div) v out1 (1v/div) v out2 (2v/div) v out1 = 1.2v, v out2 = 2.5v, i out1 = i out2 = 1a v in = 5v vin ovp threshold vs. temperature 5.60 5.65 5.70 5.75 5.80 5.85 5.90 5.95 6.00 -50 -25 0 25 50 75 100 125 temperature (c) input voltage (v) vin uvlo threshold vs. temperature 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 -50 -25 0 25 50 75 100 125 temperature (c) input voltage (v) 1 falling rising en threshold vs. temperature 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 temperature (c) enable voltage threshold (v ) falling rising
RT8056 8 ds8056-02 april 2011 www.richtek.com applications information the basic RT8056 application circuit is shown in typical application circuit. external component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency, followed by c in and c out . inductor selection for a given input and output voltage, the inductor value and operating frequency determine the ripple current. the ripple current, i l, increases with higher v in and decreases with higher inductance. ? ? ? ? ? ? ? ? ? ? ? ? ? = in out out l v v 1 l f v i having a lower ripple current reduces the esr losses in the output capacitors and the output voltage ripple. highest efficiency operation is achieved at low frequency with small ripple current. this, however, requires a large inductor. a reasonable starting point for selecting the ripple current is i l = 0.4(i max ). the largest ripple current occurs at the highest v in . to guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : ? ? ? ? ? ? ? ? ? ? ? ? ? = in(max) out l(max) out v v 1 i f v l inductor core selection once the value for l is known, the type of inductor must be selected. high efficiency converters generally cannot afford the core loss found in low-cost powdered iron cores, thus forcing the use of more expensive ferrite or permalloy cores. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on the inductanc e selected. as the inductance increases, core losses decrease. however, increas ed inductance requires more turns of wire and therefore, results in higher copper losses. ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and saturation prevention. ferrite core material saturates ? hard ? , which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy, but generally cost more than powdered iron core inductors with similar characteristics. the choice of which kind of inductor to use mainly depends on the price vs. size requirements and any radiated field/emi requirements. c in and c out selection the input capacitance, c in , is needed to filter the trapezoidal current at the source of the top mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. rms current is given by : 1 v v v v i i out in in out out(max) rms ? = this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often only based on 2000 hours of life-time which makes it advisable to further de-rate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the selection of c out is determined by the effective series resistance (esr) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response. the output ripple, v out , is determined by : ? ? ? ? ? ? + out l out 8fc 1 esr i v the output ripple is highest at maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special
RT8056 9 ds8056-02 april 2011 www.richtek.com polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr, but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density, but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr, but can be used in cost-sensitive applications, provided that consideration is given to ripple current ratings and long-term reliability. ceramic capacitors have excellent low esr characteristics, but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. using ceramic input and output capacitors higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. output voltage programming the resistive divider allo ws the fb pi n to sense a fraction of the output voltage as shown in figure 1. RT8056 fb gnd v out r1 r2 figure 1. setting the output voltage for adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : v out = v ref x (1+ r1/r2) where v ref is the internal reference voltage (0.6v typical) thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of RT8056, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for wdfn-10l 3x3 packages, the thermal resistance, ja , is 70 c/w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (70 c/w) = 1.429w for wdfn-10l 3x3 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for RT8056 package, the derating curve in figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 2. derating curve for RT8056 package 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 0255075100125 ambient temperature (c) maximum power dissipation (w ) four-layer pcb
RT8056 10 ds8056-02 april 2011 www.richtek.com layout consideration follow the pcb layout guidelines for optimal performance of RT8056. ` for the main current path, keep their traces short and wide. ` put the input capacitor as close as possible to the device pins (vin and gnd). ` lx node is with high frequency voltage swing and should be kept small area. keep analog components away from lx node to prevent stray capacitive noise pick-up. ` connect feedback network behind the output capacitors. keep the loop area small. place the feedback components near the RT8056. ` connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. figure 3. pcb layout guide fb2 nc fb1 nc lx2 en2 gnd lx1 en1 vin 9 8 7 1 2 3 4 5 10 6 gnd 11 v out1 v out2 v out1 v out2 r4 r3 r1 r2 c in l1 l2 c out1 c out2 connect the fb pin directly to feedback resistors. the resistor divider must be connected between v out and gnd the trace for l1 and l2 must be wide and short. keep sensitive compontents away from this trace. the c in between v in and gnd must be as close as possible to the ic. gnd
RT8056 11 ds8056-02 april 2011 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringemen t of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed b y richtek. richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 2.300 2.650 0.091 0.104 e 2.950 3.050 0.116 0.120 e2 1.500 1.750 0.059 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018 w-type 10l dfn 3x3 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options d 1 e a3 a a1 d2 e2 l b e see detail a

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